Timer in LPC2148

Timer in LPC 2148

  • No. of Timers : 2, (Timer0 and Timer1) n
  • The LPC2148 has two functionally identical general purpose timers: 
  • Timer0 and Timer1. 
  • Both Timer/Counter with a programmable 32-bit Prescaler.
  • Counter or Timer operation.
  • Up to four 32-bit capture channels per timer, that can take a snapshot of the
    • timer value when an input signal transitions. A capture event may also
    • optionally generate an interrupt.
  • Four 32-bit match registers that allow:
    • Continuous operation with optional interrupt generation on match.
    • Stop timer on match with optional interrupt generation.
    • Reset timer on match with optional interrupt generation
  • Up to four external outputs corresponding to match registers, with the following capabilities:
    • Set low on match.
    • Set high on match.
    • Toggle on match.
    • Do nothing on match.
  • Capture Register:-   As the name suggests it is used to Capture Input signal. When a transition event occurs on a Capture pin , it can be used to copy the value of TC into any of the 4 Capture Register or to genreate an Interrupt. Hence these can be also used to demodulated PWM signals.
  •  Match Register:-A Match Register is a Register which contains a specific value set by the user. When the Timer starts – every time after TC is incremented the value in TC is compared with match register. If it matches then it can Reset the Timer or can generate an interrupt as defined by the user. We are only concerned with match registers in this PPT.

Functional Block Diagram


  • Timer Operation:
  • Uses PCLK clock
  • Prescale Counter (PC) increments on each PCLK clock input pulse o Prescale Register (PR) holds 32-bit value
  • When PC = PR, increments Timer/Counter (TC) and resets PC o Hence, TC counting rate is controlled by PR
    • Each timer has 4 capture channels, 4 capture inputs (CAPx.0-CAPx.3) 
    • A transition on capture input, copies TC value into Capture Reg (CR) 
    • Can optionally generate interrupt also 
    • CCR configures capturing event (rising, falling or both edges) 
    • Each timer has 4 match channels, 4 match outputs (MATx.0-MATx.3)
  • For each match channel, there is a MR that holds 32-bit value
  • When TC = MR, an event (reset or stop TC, generate int) is triggered o MCR configures type of event to generate

Timer Registers

  • Timer Counter (TC): Incremented when PC = PR
  • Timer Control Register (TCR): Enables / disables, resets TC
  • Prescale Register (PR): Holds max value for PC to count up to. Controls counting rate
  • Prescale Counter (PC): Increments on every PCLK clock
  • Capture Registers 0 – 3: Transition on cap inputs copy TC into respective reg
  • Capture Control Register (CCR): Prescribes active event (rising/falling edge), int
  • Match Registers 0 – 3 (MR): Holds a value, matched with TC, matching triggers event
  • Match Control Register (MCR): Prescribes action (enabling/ disabling interrupt generation, resetting/disabling TC, or stopping TC and PC) to be triggered on match
  • Count Control Register (CTCR): Selects Timer or Counter mode;
  • Interrupt Register (IR): Has 4 bits for match interrupt, 4 bits for capture interrupt.When interrupt occurs corresponding bit is set. Writing high in a bit resets corresponding interrupt

Programming Timer Registers

The registers for a typical application are configured in the following order:

  1. TxCTCR and TxIR registers are programmed.
  2. TxPR and TxMRy are initialized with appropriate values.
  3. TxMCR and TxCCR are programmed.
  4. TC and PR are reset by programming TxTCR register.
  5. Timer is enabled by programming TxTCR register.


PWM, data acquisition, measurements of freq, speed, velocity, position

Timer Calculations

How to calculate value of prescaler ?



void delay(void);

int main(
 VPBDIV=0X02;            //30MHZ //

void delay(void)
 T0TCR=0X01;             //START TIMER//
while(T0TC !=T0MR0);    //1 SEC //
T0TCR=0X02;             //STOP TIMER //

Timer Numericals


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Last modified: Thursday, 19 September 2019, 2:08 PM