Comparison of Timers in PIC18Fxxx Microcontroller

Comparison of Timer0, Timer1, Timer2, Timer3

Sr. No.ParameterTIMER0TIMER1TIMER2TIMER3
1Block DiagramRefer TIMER0 Block
Diagram given below
Refer TIMER1 Block
Diagram given below
Refer TIMER2 Block
Diagram given below
Refer TIMER3 Block Diagram given below
2Control Register StructureRefer T0CON Register
structure given below
Refer T1CON Register
structure given below
Refer T2CON Register
structure given below
Refer T3CON Register
structure given below
3Special Function Registers associatedTMR0H, TMR0LTMR1H, TMR1LTMR2, PR2TMR3H, TMR3L
4Timer Mode of Operation8-bit / 16-bit16-bit8-bit16-bit
5Counter Mode of Operation8-bit / 16-bit Counter 016-bit Counter 1Not Available as CounterCounter 3
6Pre-Scaling Factor2, 4, 8, 16, 32, 64, 128, 2561, 2, 4, 81, 4, 161, 2, 4, 8
7Post-Scaling FactorNot AvailableNot Available1, 2, 3, 4, 5, 6. 7, 8,
9, 10, 11, 12, 13, 14,15, 16
Not Available
8Clock Source for CCP ModuleCan't useCapture, Compare mode
of CCP module
PWM mode of CCP moduleCapture, Compare mode
of CCP module

Timer0 Module

The Timer0 module incorporates the following features:

  • Software selectable operation as a timer or counter in both 8-bit or 16-bit modes
  • Readable and writable registers
  • Dedicated 8-bit, software programmable prescaler
  • Selectable clock source (internal or external)
  • Edge select for external clock
  • Interrupt-on-overflow

The T0CON register controls all aspects of the module’s operation, including the prescale selection. It is both readable and writable. A simplified block diagram of the Timer0 module in 8-bit mode is shown in Figure. Figure shows a simplified block diagram of the Timer0 module in 16-bit mode.

T0CON
76543210
TMR0ONT08BITT0CST0SEPSAT0PS2T0PS1T0PS0
BitDescription
7TMR0ON: Timer0 On/Off Control bit
  • 1 = Enables Timer0
  • 0 = Stops Timer0 
6T08BIT: Timer0 8-Bit/16-Bit Control bit
  • 1 = Timer0 is configured as an 8-bit timer/counter
  • 0 = Timer0 is configured as a 16-bit timer/counter 
5T0CS: Timer0 Clock Source Select bit
  • 1 = Transition on T0CKI pin
  • 0 = Internal instruction cycle clock (CLKO) 
4T0SE: Timer0 Source Edge Select bit
  • 1 = Increment on high-to-low transition on T0CKI pin
  • 0 = Increment on low-to-high transition on T0CKI pin 
3PSA: Timer0 Prescaler Assignment bit
  • 1 = TImer0 prescaler is not assigned. Timer0 clock input bypasses prescaler.
  • 0 = Timer0 prescaler is assigned. Timer0 clock input comes from prescaler output
2R/W: Read/Write Information bit Used in I2C mode only. 
1-0T0PS<2:0>: Timer0 Prescaler Select bits
  • 111 = 1:256 Prescale value
  • 110 = 1:128 Prescale value
  • 101 = 1:64   Prescale value
  • 100 = 1:32   Prescale value
  • 011 = 1:16   Prescale value
  • 010 = 1:8     Prescale value
  • 001 = 1:4     Prescale value
  • 000 = 1:2     Prescale value
Timer0(8-bit mode) Block Diagram

timer0 8bit mode

Timer0 (16-bit mode) Block Diagram

timer0 16bit mode

TIMER1 Module

The Timer1 timer/counter module incorporates these features:

  • Software selectable operation as a 16-bit timer or counter
  • Readable and writable 8-bit registers (TMR1H and TMR1L)
  • Selectable clock source (internal or external) with device clock or Timer1 oscillator internal options
  • Interrupt-on-overflow
  • Reset on CCP Special Event Trigger
  • Device clock status flag (T1RUN)
T1CON
76543210
RD16T1RUNT1CKPS1T1CKPS0T1OSCENT1SYNCTMR1CSTMR1ON
BitDescription
7RD16: 16-Bit Read/Write Mode Enable bit
  • 1 = Enables register read/write of TImer1 in one 16-bit operation
  • 0 = Enables register read/write of Timer1 in two 8-bit operations 
6T1RUN: Timer1 System Clock Status bit
  • 1 = Device clock is derived from Timer1 oscillator
  • 0 = Device clock is derived from another source
5-4T1CKPS<1:0>: Timer1 Input Clock Prescale Select bits
  • 11 = 1:8 Prescale value
  • 10 = 1:4 Prescale value
  • 01 = 1:2 Prescale value
  • 00 = 1:1 Prescale value 
3T1OSCEN: Timer1 Oscillator Enable bit
  • 1 = Timer1 oscillator is enabled
  • 0 = Timer1 oscillator is shut off The oscillator inverter and feedback resistor are turned off to eliminate power drain. 
2T1SYNC: Timer1 External Clock Input Synchronization Select bit
  • When TMR1CS = 1
    • 1 = Do not synchronize external clock input
    • 0 = Synchronize external clock input
  • When TMR1CS = 0 
    • This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0. 
1TMR1CS: Timer1 Clock Source Select bit 1 = External clock from pin RC0/T1OSO/T13CKI (on the rising edge) 0 = Internal clock (FOSC/4) 
0TMR1ON: Timer1 On bit
  • 1 = Enables Timer1
  • 0 = Stops Timer1
Timer1 Block Diagram

timer1 block diagram

timer 1 as oscillator
 

Timer2 Module

The Timer2 module timer incorporates the following features:

  • 8-Bit Timer and Period registers (TMR2 and PR2, respectively)
  • Readable and writable (both registers)
  • Software programmable prescaler (1:1, 1:4 and 1:16)
  • Software programmable postscaler (1:1 through 1:16)
  • Interrupt on TMR2 to PR2 match
  • Optional use as the shift clock for the MSSP module The module is controlled through the T2CON register (Register13-1), which enables or disables the timer and configures the prescaler and postscaler. Timer2 can be shut off by clearing control bit, TMR2ON (T2CON<2>), to minimize power consumption. A simplified block diagram of the module is shown in Figure.
T2CON
76543210
-T2OUTPS3T2OUTPS2T2OUTPS1T2OUTPS0TMR2ONT2CKPS1T2CKPS0
BitDescription
7Unimplemented
6-3

 T2OUTPS<3:0>: Timer2 Output Postscale Select bits

  • 0000 = 1:1 Postscale
  • 0001 = 1:2 Postscale
  • 0010 = 1:3 Postscale
  • 0011 = 1:4 Postscale
  • 0100 = 1:5 Postscale
  • 0101 = 1:6 Postscale
  • 0110 = 1:7 Postscale
  • 0111 = 1:8 Postscale
  • 1000 = 1:9 Postscale
  • 1001 = 1:10 Postscale
  • 1010 = 1:11 Postscale
  • 1011 = 1:12 Postscale
  • 1100 = 1:13 Postscale
  • 1101 = 1:14Postscale
  • 1110 = 1:15 Postscale
  • 1111 = 1:16 Postscale 
2TMR2ON: Timer2 On bit
  • 1 = Timer2 is on
  • 0 = Timer2 is off 
1-0 T2CKPS<1:0>: Timer2 Clock Prescale Select bits
  • 00 = Prescaler is 1
  • 01 = Prescaler is 4
  • 1x = Prescaler is 16
Timer2 Block Diagram

timer2 block diagram

Timer3 Module

The Timer3 module timer/counter incorporates these features:

  • Software selectable operation as a 16-bit timer or counter
  • Readable and writable 8-bit registers (TMR3H and TMR3L)
  • Selectable clock source (internal or external) with device clock or Timer1 oscillator internal options
  • Interrupt-on-overflow
  • Module Reset on CCP Special Event Trigger A simplified block diagram of the Timer3 module is shown in Figure 14-1. A block diagram of the module’s operation in Read/Write mode is shown in Figure 14-2. The Timer3 module is controlled through the T3CON register. It also selects the clock source options for the CCP modules “CCP Modules and Timer Resources” for more information. 
T3CON register
76543210
RD16T3CCP2T3CKPS1T3CKPS0T3CCP1T3SYNCTMR3CSTMR3ON
BitDescription
7RD16: 16-Bit Read/Write Mode Enable bit
  • 1 = Enables register read/write of TImer3 in one 16-bit operation
  • 0 = Enables register read/write of Timer3 in two 8-bit operations 
6,3 T3CCP<2:1>: Timer3 and Timer1 to CCPx Enable bits 1x = Timer3 is the capture/compare clock source for the CCP modules 01 = Timer3 is the capture/compare clock source for CCP2; Timer1 is the capture/compare clock source for CCP1 00 = Timer1 is the capture/compare clock source for the CCP modules 
5-4T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits 11 = 1:8 Prescale value 10 = 1:4 Prescale value 01 = 1:2 Prescale value 00 = 1:1 Prescale value 
3T1OSCEN: Timer1 Oscillator Enable bit
  • 1 = Timer1 oscillator is enabled
  • 0 = Timer1 oscillator is shut off The oscillator inverter and feedback resistor are turned off to eliminate power drain. 
2T3SYNC: Timer3 External Clock Input Synchronization Select bit
  • When TMR3CS = 1
    • 1 = Do not synchronize external clock input
    • 0 = Synchronize external clock input
  • When TMR3CS = 0 
    • This bit is ignored. Timer1 uses the internal clock when TMR3CS = 0. 
1 TMR3CS: Timer3 Clock Source Select bit 1 = External clock input from Timer1 oscillator or T13CKI (on the rising edge after the first falling edge) 0 = Internal clock (FOSC/4) 
0TMR3ON: Timer3 On bit 1 = Enables Timer3 0 = Stops Timer3
Timer3 block Diagram

timer3 block diagram

References

  • Created, Edited and Notes by Prof. Sujit Wagh, SKNCOE, Pune
  • WikiNote Foundation

Last modified: Tuesday, 17 September 2019, 12:57 PM