Timers and its modes in 8051
- Two 16 bit timers/counters, which can be programmed independently as - timer or event counter.
- Four-SFRs connected with TIMER/COUNTER operation
- TMOD - Timer Mode Register
- TCON - Timer Control Register
- TH0, TL0 - Timer/Counter - 0
- TH1, TL1 - Timer/Counter - 1
- Two pins of 8051 connected with Timer/counter.
- T0 - Timer 0 external input - P3.4
- T1 - Timer 1 external input - P3.5
- INT0 and INT1 are also used for controlling the timers/counters.
- Timer Register (TH0, TL0 or TH1, TL1) incremented every m/c cycle. Thus working at increment frequency of 1/12 of oscillator frequency (for 12 oscillator machine cycle).
- Any preset value i.e. initial count can be loaded to TH0, TL0 or TH1, TL1.
- Clock frequency = 11.0592 MHz, Clock period = 1/12 µ sec, Machine cycle time = 1.08 µ sec
Thus timer register will be incremented every microsecond.
If timer is initialized to 0000H;
max. count = FFFFH and
max. time measured = 65536 * 1.08 µ sec= 70.77 milliseconds
Counts pulses occurring at T0 pin (Timer/Counter 0) and/or T1 pin (Timer/Counter 1).
May correspond to event like
- Passing of railway coach from a point - axle counter
- Rotation of speedometer cable
- speedometer of vehicle
- Number of persons visiting exhibition.
T0, T1 scanned every m/c cycle
nth m/c cycle – T1 or T0 = High
(n+1)th m/c – T1 or T0 = Low
Timer 0 or timer 1 incremented in (n+1)th m/c cycle
Count frequency = min 2 m/c cycle per count
T0- P3.4, T1- P3.5
Timer Mode Control Register - TMOD
M1 and M0 specify the mode as follows:
Description in brief
Timer in mode0
Timer in mode1
Timer in mode2
8-bit Timer/counter with autoreload
Timer in mode3
Split Timer 0 into two 8-bit counters or to stop Timer 1
- If C/T = 1, the timers function as counters to count the negative transitions at T0 or T1 pins.
- If C/T = 0, the timers function as timers, that is, they basically count the number of machine cycles.
- Gate = 0 means that the timer is controlled by TR1 or TR0 only, irrespective of INT0 or INT1.
- Gate = 1 means that the timer control will depend on INT0 or INT1 and also on TR0 or TR1 bits
- When data is written it gets latched.
- TMOD is used for setting mode bits M1, M0,
- Gate bit and C/T for Timer 0 and Timer 1.
- Bit 0 to 3 for Timer 0.
- Bit 4 to 7 for Timer 1.
Timer Control Register - TCON
- Bit 0 to 3 – used for interrupt functions
- Bit 4 to 7 – used for setting TR0, TR1 by software
- Setting TF0, TF1 by counter i.e. hardware
- When count rolls from all 1’s to all 0’s.
Timer 1 overflow flag. Set by hardware when the timer/counter overflows.
Timer 1 run control bit. Set/cleared by software to turn the timer/counter on/off.
Timer 0 overflow flag. Set by hardware when the timer/counter overflows.
Timer 0 run control bit. Set/cleared by software to turn the timer/counter on/off.
- As value in Timer register rolls from all ones (i.e. FFFFH) to all zero’s (i.e. 0000H) interrupt flag (TF0 or TF1) will be set.
- TF0 (for Timer 0) and TF1 (for Timer 1) are bits of TCON SFR.
- IF Timer 0 or Timer 1 interrupt is enabled then program control will branch to interrupt servicing routine as shown in figure below
Modes are set by M1 M0 bits of TMOD register.
Mode 0: 13 bit Timer/Counter operation
- TH0, TL0 (for Timer 0) or TH1, TL1 (for Timer 1) used as 13 bit counter.
- All 8 bits of TH0 or TH1
- 5 lower bits of TL0 or TL1 are used, for counting.
- When count rolls over from all 1’s to all 0’s, - interrupt flag TF0 or TF1 is set.
- In above figure when C/T = 0 - timer operation count incremented every m/c cycle.
- Case I: TR0 (TCON. 4) or TR1 (TCON. 6) = 1 and Gate (TMOD. 3) or (TMOD. 7) = 0
- Case II: TR0 or TR1 =1 and Gate = 1 and INT0 or INT1 = 1
- Thus by sending Logic High signal on INT0 (or INT1) pins.Timer 0 or Timer 1 can be started.
Example: This can be used for finding pulse width in the following way.
- C/T = 0 – Timer operation
- TR0 or TR1 = 1
- Gate = 1
- Source of pulse connected to INT0 or INT1 pin
- When pulse goes high: timer starts counting at the rate 1/12 clock frequency.
- When pulse goes low: Timer stops.
- INT0 or INT1 = Low: causes interrupt.
- ISR can read the timer value.
- ISR can store the timer value and process it as required by the application.
Mode 1: 16 bit Timer/Counter operation
- Operation same as mode 0 except that all bits of TH0, TL0 or TH1, TL1 are used.
- When count rolls over from all 1’s to all 0’s – TF0 or TF1 interrupt flag is set.
- Causes interrupt if enabled.
Mode 2: 8 bit auto-reload Timer/Counter
- Only TL0 or TL1 are used. That is 8 bit counting.
- Initial preset value is loaded to TH0 or TH1 by software.
- The value is loaded to TL0 or TL1 by hardware automatically before it starts counting.
- When count rolls from all 1’s (i.e. FFH) to all 0’s (i.e. 00H)
- TF0 or TF1 flag is set
- Preset value in TH0 or TH1 is reloaded to TL0 or TL1
- Operation i.e. Counting starts automatically.
Mode 3: Split Timer/Counter operation
When Timer 0 is put in mode 3:
- It acts as two 8 bit counters, i.e. TL0 and TH0 become two separate counter.
TL0: 8 bit operation in mode 0 or mode 1 (Timer or Counter); controlled by C/T, TR0, Gate, INT0.
- Sets TF0 when count rolls to all 0’s from all 1’s.
TH0: Timer function only.
- Controlled by TR1 i.e. starts when TR1 = 1.
When count rolls to all 0’s from all 1’s – TF1 flag is set.
Note: TR1 and TF1 are used in Timer 0 (TH0) even though they are bits for Timer 1. When Timer 1 is put in mode 3 it just holds the preset count same as TR0 = 0, i.e. opening the switch.
[Modes 0, 1 and 2 are mostly used.]
Steps for Timer Programming
- Load the TMOD register indicating which timer is to be used
- Load the timer register TLx and THx with initial count values
- Start timer using instruction SETB TRX or SETB TCON.6 or SETB TCON.4
- Keep monitoring Timer flag with the instruction Here: JNB TFx, Here
- Get out of loop when TFx becomes high
- Stop the timer
- Clear the Timer overflow flag
a. Configuring Timer/Counter using TMOD
TMOD = 0000 0101 = 05H, hence:
- MOV TMOD, #05H
Timer 1: TIMER Mode = 00 (13 bit operation)
Timer 0: Counter Mode = 01 (16 bit operation)
b. To load initial count as preset value
Work out the preset value = ABCDH - Timer 0
Load the preset value = 0000H - Timer 1
MOV TL0, #CDH
MOV TH0, #ABH
MOV TL1, #00H
MOV TH1, #00H
c. Start Timer/Counter through TR0, TR1 bits from TCON
Make TR0 = 1, TR1 = 1
TCON = 0101 0000 = 50 H
MOV TCON, #50H or
SETB TCON.4 or
d. When count value in Timer Register transits from all 1’s to all 0’s
Following tasks need to be done.
- Preset value to be loaded to Timer Register
- Timer interrupt flag (TF0 or TF1) to be cleared
Example 1:Generate a square wave of 50% duty cycle at pin p1.7. Use Timer 1 to generate time delay. Clock frequency = 12 MHz, 12 oscillator clock. Pulse width = 50 millisecond.
Solution: Let us work out the initial preset value.
1 m/c cycle = 1 microsecond
50 millisecond = 50,000 m/c cycle
FFFF = 65535
Difference = 65535 - 50000 = 15535 m/c cycle
- Since count will roll from FFFF to 0000 additional m/c cycle will be required to set TF0 or TF1.
- Thus initial count must be 15536 = 3CB0H
- By putting initial preset count of 3CB0H (or 15536 decimal), the register will reach FFFF in 49999 m/c cycle and roll over to 0000 in 50,000th m/c cycle accounting for 50 millisecond
a. Configure Timer 1 using TMOD register
Gate = 0, C/T = 0, Mode = 01 (16 bit timer operation)
MOV TMOD , # 10H
Make P1.7 = Low initially CLR P1.7
b. Load Preset Value
KK: MOV TL1, #B0H
MOV TH1, #3CH
c. Complement P1.7
d. Start Timer 1 (TR1 = 1) using instruction SETB TCON.6 or SETB TR1
e. Check for TF1=1 in loop using instruction JNB TCON.7, $
f. TF1=1, Make TF1=0 using instruction CLR TCON.7
g. Stop Timer 1 Make TR1=0 using instruction CLR TCON.6
h. SJMP KK
MOV TH1, #3CH
TDELY: SETB TCON.6
JNB TCON.7, $
Write an ALP to generate delay of 3 ms using timer 0. Clock frequency = 16 MHz.Also find out the value to be loaded in TH0,TL0 register.
- 1 m/c cycle frequency = 16MHz/12 = 1.33 MHz
- 1 m/c cycle time period = 1/f = 0.75 µ sec
- Time Delay required = 3milli seconds
- 1 m/c generates delay of ----- 0.75 µsec
- How many machine cycles required to generate delay of 3 millisec =
- We will assume Timer0 in mode1 (16 -bit timer) TMOD = 01H
[Initial value in Timer registers] = 65535 + 1 (overflow): no. of machine cycles................all values in decimal
Initial Value = 65536 - 4000 = 62536 whose Hexadecimal value is F448H.
Hence TH0 and TL0 becomes: TH0 = 0F4H and TL0 = 48H.
MOV TH1, #48H
TDELY: SETB TR0
- Created and edited by Prof. S.M.Wagh, Sinhgad's SKNCOE, Pune
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