Table of Contents

Lab Practice

List of Experiments:

  1. To write VHDL code, simulate with test bench, synthesis, implement on PLD. [Any 4].
    1. 4 bit ALU for add, subtract, AND, NAND, XOR, XNOR, OR, & ALU pass.
    2. Universal shift register with mode selection input for SISO, SIPO, PISO, & PIPO modes.
    3. FIFO memory.
    4. LCD interface.
    5. Keypad interface.
  2. To prepare CMOS layout in selected technology, simulate with and without capacitive load, comment on rise, and fall times.
    1. Inverter, NAND, NOR gates, Half Adder
    2. 2:1 Multiplexer using logic gates and transmission gates.
    3. Single bit SRAM cell.
    4. D flip-flop.


  • Created and Edited by Prof S.S. Padmavar, SKNCOE, Pune
  • WikiNote Foundation
Created by Sujit Wagh on 2017/10/11 18:10