PIC18Fxxx Architecture

Updated on 2017/11/17 18:12

Syllabus

PIC18Fxxx Architecture

PIC18Fxxxx Architecture

pic_architecture.png

Arithmetic Logic Unit

  •  Instruction Decoder
    • 16-bit Instructions
  • STATUS:  Flag Register
    •  5 individual bits called flags
  • WREG (W):  Working Register
    • 8-bit Accumulator
  • Product
    • 16-bit Product of 8-bit by 8-bit Multiply

alu-unit.png

PIC Status Register

BitD7D6D5D4D3D2D1D0
Field---NOVZDCC
  •  N (Negative Flag)
    • Set when bit B7 is one as the result of an arithmetic/logic operation
  • OV (Overflow Flag)
    • Set when result of an operation of signed numbers goes beyond 7-bits
  • Z (Zero Flag)
    • Set when result of an operation is zero
  • DC (Digit Carry Flag) (Half Carry)
    • Set when carry generated from Bit3 to Bit4 in an arithmetic operation
  • C (Carry Flag)
    • Set when an addition generates a carry 

Registers

Program Counter (PC)

  • 21-bit register functions as a pointer to program memory during program execution  

Table Pointer

  • 21-bit register used as a memory pointer to copy bytes between program memory and data registers

Stack Pointer (SP)

  • 5-bit register used to point to the stack

Stack

  • 31 registers used for temporary storage of memory addresses during execution of a program  

BSR:  Bank Select Register  (0 to F)

  • 4-bit Register
  • Provides upper 4-bits of 12-bit address of data memory

FSR:  File Select Registers

  • FSR0, FSR1, and FSR2
  • FSR: composed of two 8-bit registers
  • FSRH and FSRL
  • Used as pointers for data registers
  • Holds 12-bit address of data register 

Special Function Registers

SFRs:   

Data registers associated with I/O ports, support devices, and processes of data transfer

  •  I/O Ports (A to E)
  • Interrupts
  • EEPROM
  • Serial I/O
  • Timers
  • Capture/Compare/PWM (CCP)
  • Analog-to-Digital (A/D) Converter 

SFR's-in-pic18.png

MPU and Memory

Mempry-Protection-Unit-and-Memory.png

PIC18F Programming Model

PIC18F Programming Model
The representation of the internal architecture of a microprocessor, necessary to write assembly language programs  
Divided into two groups

  •  Arithmetic Logic Unit (ALU) and Registers
    • From Microprocessor Unit (MPU)
  • Special Function Registers (SFRs)
    • From Data (File) Memory

pic18-programming-model.png

References

  • Created, Edited, and Notes by Prof. Sujit Wagh, SKNCOE, Pune
  • WikiNote Foundation
Tags:
Created by Sujit Wagh on 2017/09/13 18:31
Translated into en by Sujit Wagh on 2017/09/13 18:31