Syllabus

Interfacing with RGB LED, Seven Segment, TFT Display, MOTOR control using PWM.

Interfacing with RGB LED

About RGB LED

Description: Ever hear of a thing called RGB? Red, Green, Blue? How about an RGB LED? These 5mm units have four pins - Cathode is the longest pin. One for each color and a common cathode. Use this one LED for three status indicators or pulse width modulate all three and get mixed colors!

Features:

  • Forward Voltage (RGB): (2.0, 3.2, 3.2)V
  • Luminosity (RGB): (800, 4000, 900)mcd

RGB (Red-Green-Blue) LEDs are actually three LEDs in one! But that doesn’t mean it can only make three colors. Because red, green, and blue are the additive primary colors, you can control the intensity of each to create every color of the rainbow. Most RGB LEDs have four pins: one for each color and a common pin. On some, the common pin is the anode, and on others, it’s the cathode.

LPC-1768-colour-truth-table.png     LPC-1768-LED.png

Interfacing Diagram

RGB_LED.png

Embedded C program for the Interfacing

Program to turn on RED, GREEN, BLUE LED one by one
#include<lpc17xx.h>
void delay();
int main()
{
LPC_GPIO0->FIODIRL=0X0007;//Configure P0.0,P0.1,P0.2 as output pins
while(1)
 {
   LPC_GPIO0->FIOSETL=0X0001; //Turn RED led on
  delay();
   LPC_GPIO0->FIOCLRL=0X0001;//Turn RED led off
  delay();
   LPC_GPIO0->FIOSETL=0X0002;//Turn Green led on
  delay();
   LPC_GPIO0->FIOCLRL=0X0002;//Turn Green led off
  delay();
   LPC_GPIO0->FIOSETL=0X0004;//Turn blue led on
  delay();
   LPC_GPIO0->FIOCLRL=0X0004;//Turn blue led off
  delay();
}
return 0;
}
void delay()
{
int i,j;
for(i=0;i<10000;i++)
for(j=0;j<1000;j++);
}

Interfacing Seven Segment Display

About Seven Segment Display

A seven segment display is the most basic electronic display device that can display the digits from 0-F (hexadecimal numbers). The seven segment pins (a,b,c,d,e,f,g) plus the decimal point of a common anode display are connected to port pins of LPC1768 via current limiting resistors (220 Omega). The program is developed using software to display hexadecimal numbers 0-F on the display.

Pins Configuration

7-segment-display.png      7-segment-display-1.png

Seven segment LED is device having seven light emitting diodes with either anode terminals (common anode ) or cathode terminals connected together to form a number '8' pattern as shown in the picture.

To use them you should know the pin configuration of the commercially available displays. As you must have guessed these displays should have nine pins( one for each segment + decimal point +common) but the available modules have two pins for common ground. They are internally connected. So they have total of 10 pins.

A 7-Segment display has 7-segments/pins named as a, b, c, b, e, f, g for forming the '8' pattern and and another segment/pin called 'h' for DP (decimal point) along with two extra pins for GND (in case of common cathode).

Displaying Characters

To display numbers in seven-segment display, it is necessary to define the control signals. Below table shows the segment control for characters 0-9 as required for displaying numbers.

Segment Control table for displaying characters 0 to 9
Numberhgfedcba
000111111
100000110
201011011
301001111
400110110
501101101
601111101
700000111
801111111
901101111

Algorithm for Interfacing

The software is developed based on following algorithm:

  1. Initialize the board
  2. Initialize the seven segment display with variables
  3. Set the control direction register IODIR to configure the GPIO port pins as output pins.
  4. Display the hex numbers on seven segment display in up counter manner.

Interfacing diagram

Seven_Segment_display.pngLPC1768 Interface with 7-segment display 

Embedded C program for the Interfacing

Program to display DECIMAL Nos.00 to 99 on the Seven Segment display using LPC1768

#include<LPC17xx.h>
void delay(void);
int main()
{
int i, j, k;
int array[] = {0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f};
LPC_GPIO0->FIODIRL = 0x0FF0;
LPC_GPIO0->FIODIR3 = 0x08;          
LPC_GPIO1->FIODIR2 = 0x40;         
while(1)
{
for(j=0; j<10; j++)
 {
 for(i=0; i<10; i++)
   {
    for(k=0; k<100; k++)
     {
 LPC_GPIO0->FIOSET3 = 0x08;
 LPC_GPIO1->FIOCLR2 = 0x40;
 LPC_GPIO0->FIOCLRL = 0x0ff0;
 LPC_GPIO0->FIOSETL = (array[j]<<4);
 delay();
 LPC_GPIO0->FIOCLR3 = 0x08;
 LPC_GPIO1->FIOSET2 = 0x40;
 LPC_GPIO0->FIOCLRL = 0x0ff0;
 LPC_GPIO0->FIOSETL = (array[i]<<4);
 delay();
    }
   }
  }
 }
return 0;
}

void delay(void)
{
 int i, j;
 for(i=0; i<1000; i++)
  for(j=0; j<10; j++);

}

TFT Display

About TFT Display

TFT-display.png

  • A thin-film-transistor liquid-crystal display (TFT LCD) is a variant of a liquid-crystal display (LCD) that uses thin-film transistor (TFT) technology to improve image qualities such as addressability and contrast.
  • TFT LCDs are used in appliances including television sets, computer monitors, mobile phones, handheld video game systems, personal digital assistants, navigation systems and projectors.
  • Short for thin film transistor, a type of LCD flat-panel display screen, in which each pixel is controlled by from one to four transistors. The TFT technology provides the best resolution of all the flat-panel techniques, but it is also the most expensive. TFT screens are sometimes called active-matrix LCDs.
  • A type of flat-panel display in which the screen is refreshed more frequently than in conventional passive-matrix displays. The most common type of active-matrix display is based on a technology known as TFT (thin film transistor). The two terms, active matrix and TFT, are often used interchangeably.

SPI Protocol for Interfacing

We are interfacing the TFT display with LPC1768 using SPI protocol.

  • The LPC1768 has two Synchronous Serial Port controllers - SSP0 and SSP1.
  • The SSP is a Synchronous Serial  Port (SSP)  controller  capable  of  operation  on  a  SPI,  4-wire  SSI,  or Microwire bus.
  • It can interact with multiple masters and slaves on the bus. Only a single master and a single slave can communicate on the bus during a given data transfer.
  • Data transfers are in principle full duplex, with frames of 4 to 16 bits of data flowing from the master to the slave and from the slave to the master at the same time.
  • Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select lines.

SPI.png

SPI Data waveform

spi_waveform.png

The SPI bus specifies four logic signals:

  1. SCLK : Serial Clock (or SCK).
  2. MOSI : Master Output, Slave Input (or SDO (for master devices), SDI(for slave devices), SI).
  3. MISO : Master Input, Slave Output (or SDO (for master devices), SDI(for slave devices), SI).
  4. SS : Slave Select (or CS,nCS, nSS, SYNC).

SPI Registers in LPC1768

SPI Registers
SymbolMeaningFunction
S0SPCRSPI Control RegisterControls the operation of SPI module
S0SPSRSPI Status  RegisterIndicates the status of SPI protocol data transfer
S0SPDRSPI Data  RegisterTx Buffer-Write into this while transmitting data
Rx Buffer-Read from this register while receiving data
S0SPCCRSPI Clock counter  RegisterControls the frequency of SPI communication in master mode(Serial clock)
S0SPINTSPI Interrupt flagInterrupt flag for SPI interface

Interfacing Diagram

TFT_LPC1768.PNG

Interfacing TFT Display with LPC1768 

Pin Connections between TFT LCD and LPC1768

Pin Details for the Interfacing

TFT LCD 

LPC1768

Description

D10 (3)P0.4LCD Data Bit 0

D11 (4)

P0.5

LCD Data Bit 1

D12 (5)

P0.6

LCD Data Bit 2

D13 (6)

P0.7

LCD Data Bit 3

D14 (7)

P0.8

LCD Data Bit 4

D15 (8)

P0.9

LCD Data Bit 5

D16 (9)

P0.10

LCD Data Bit 6

D17 (10)

P0.11

LCD Data Bit 7

LCD_CS (11)

P0.6

LCD Chip Select

LCD_RS (12)

P1.25

LCD Register Select

LCD_WR/LCD_SCK (13)

P0.7

LCD Write / LCD SPI Clock

LCD_RD (14)

P1.26

LCD Read

RESET (15)

RST

Reset

LCD_SDO (16)

P0.8

LCD SPI Data Out

LC_SDI (17)

P0.9

LCD SPI Data In

TP_CS (32)

P1.21

Touch Panel Chip Select

TP_SCK (33)

P1.20

Touch Panel SPI Clock

TP_SDI (34)

P1.23

Touch Panel SPI Data In

TP_SDO (35)

P1.24

Touch Panel SPI Data Out

TP_IRQ (36)

P2.12

Touch Panel Interrupt

BL_CTRL (40)

P1.29

BackLight Control

MOTOR control using PWM

LPC1768 PWM Module

LPC1768 has 6 PWM output pins which can be used as 6-Single edged or 3-Double edged. There are seven match registers to support these 6 PWM output signals. Below block diagram shows the PWM pins and the associated Match(Duty Cycle) registers.

PWM pins and associated  Match Registers

PWM Channel

Port Pin

Pin Functions

Associated PINSEL Register

Corresponding Match Register

PWM_1

P2.0

0-GPIO, 1-PWM1[1], 2-TXD1, 3-

0,1 bits of PINSEL4

MR1

PWM_2

P2.1

0-GPIO, 1-PWM1[2], 2-RXD1, 3-

2,3 bits of PINSEL4

MR2

PWM_3

P2.2

0-GPIO, 1-PWM1[3], 2-CTS1, 3-TRACEDATA[3]

4,5 bits of PINSEL4

MR3

PWM_4

P2.3

0-GPIO, 1-PWM1[4], 2-DCD1, 3-TRACEDATA[2]

6,7 bits of PINSEL4

MR4

PWM_5

P2.4

0-GPIO, 1-PWM1[5], 2-DSR1, 3-TRACEDATA[1]

8,9 bits of PINSEL4

MR5

PWM_6

P2.5

0-GPIO, 1-PWM1[6], 2-DTR1, 3-TRACEDATA[0]

10,11 bits of PINSEL4

MR6

LPC1768 PWM Registers

The below table shows the registers associated with LPC1768 PWM.

LPC1768 PWM Registers

Register

Description

IR

Interrupt Register: The IR can be read to identify which of eight possible interrupt sources are pending. Writing Logic-1 will clear the corresponding interrupt.

TCR

Timer Control Register: The TCR is used to control the Timer Counter functions(enable/disable/reset).

TC

Timer Counter: The 32-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR.

PR

Prescalar Register: This is used to specify the Prescalar value for incrementing the TC.

PC

Prescale Counter: The 32-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented.

MCR

Match Control Register: The MCR is used to control the reseting of TC and generating of interrupt whenever a Match occurs.

MR0

Match Register: This register hold the max cycle Time(Ton+Toff).

MR1-MR6

Match Registers: These registers holds the Match value(PWM Duty) for corresponding PWM channels(PWM1-PWM6).

PCR

PWM Control Register: PWM Control Register. Enables PWM outputs and selects PWM channel types as either single edge or double edge controlled.

LER

Load Enable Register: Enables use of new PWM values once the match occurs.

Important PWM Register Configurations

Below are shown some important registers associated with LPC1768 PWM.

Timer Control Register

TCR

31:4

3

2

1

0

Reserved

Reserved

PWM Enable

Counter Reset

Counter Enable

Bit 0 – Counter Enable
This bit is used to Enable or Disable the PWM Timer and PWM Prescalar Counters
0- Disable the Counters
1- Enable the Counter incrementing.

Bit 1 – Counter reset
This bit is used to clear the PWM Timer and PWM Prescalar Counter values.
0- Do not Clear.
1- The PWM Timer Counter and the PWM Prescale Counter are synchronously reset on the next positive edge of PCLK.

Bit 2 – PWM Enable
Used to Enable or Disable the PWM Block.
0- PWM Disabled
1- PWM Enabled

Match Control Register

MCR

31:21

20

19

18

-

5

4

3

2

1

0

Reserved

PWMMR6S

PWMMR6R

PWMMR6I

-

PWMMR1S

PWMMR1R

PWMMR1I

PWMMR0S

PWMMR0R

PWMMR0I

PWMMRxI
This bit is used to Enable or Disable the PWM interrupts when the PWMTC matches PWMMRx (x:0-6)
0- Disable the PWM Match interrupt
1- Enable the PWM Match interrupt.

PWMMRxR
This bit is used to Reset PWMTC whenever it Matches PWMRx(x:0-6)
0- Do not Clear.
1- Reset the PWMTC counter value whenever it matches PWMRx.

PWMMRxS
This bit is used to Stop the PWMTC,PWMPC whenever the PWMTC matches PWMMRx(x:0-6).
0- Disable the PWM stop o match feature
1- Enable the PWM Stop feature. This will stop the PWM whenever the PWMTC reaches the Match register value.

PWM Control Register:

PCR

31:15

14-9

8-7

6-2

1-0

Unused

PWMENA6-PWMENA1

Unused

PWMSEL6-PWMSEL2

Unused

PWMSELx
This bit is used to select the single edged and double edge mode form PWMx (x:2-6)
0- Single Edge mode for PWMx
1- Double Edge Mode for PWMx.

PWMENAx
This bit is used to enable/disable the PWM output for PWMx(x:1-6)
0- PWMx Disable.
1- PWMx Enabled.
 

Load Enable Register

LER

31-7

6

5

4

3

2

1

0

Unused

LEN6

LEN5

LEN4

LEN3

LEN2

LEN1

LEN0

LENx
This bit is used Enable/Disable the loading of new Match value whenever the PWMTC is reset(x:0-6)
PWMTC will be continously incrementing whenever it reaches the PWMMRO, timer will be reset depeding on PWMTCR configuraion. Once the Timer is reset the New Match values will be loaded from MR0-MR6 depending on bits set in this register.
0- Disable the loading of new Match Values
1- Load the new Match values from MRx when the timer is reset.

PWM Working

After looking into the PWM registers, its time to see how the LPC1768 PWM module works.

The TC is continuously incremented and once it matches the MR1(Duty Cycle) the PWM pin is pulled Low. TC still continues to increment and once it reaches the Cycle time(Ton+Toff) the PWM module does the following things:

  • Reset the TC value.
  • Pull the PWM pin High.
  • Loads the new Match register values.

https://exploreembedded.com/wiki/images/8/85/LPC1768_PWM.gif

 Image: exploreembedded.com

Summary of PWM operations for the given image:

  • Slide1: The TC is being incremented as per the Pre-scalar configuration. The PWM output is high as the TC is still less that duty cycle.
  • Slide2: TC is incremented to 40 and still the PWM pin as HIGH.
  • Slide3: TC is incremented to 60 and it matches the Duty Cycle(MR1=60).
  • Slide4: Now the Comparator1(Green) will trigger the R of SR latch and Pulls the PWM output to Zero(Q=0). TC still continues to increment.
  • Slide5: TC is incremented to 80 and PWM pin is low as TC>Duty Cycle.
  • Slide6: Now TC is 100 and it matches the Cycle time(MR0==100).
  • Slide7: Now the Comparator2(Red) will trigger the S of SR latch and pulls the PWM output to ONE(Q==1). It also resets the TC to zero. It updates Shadow buffers with new Match values from MRO,MR1.

Algorithm to Configure PWM module

  1. Configure the GPIO pins for PWM operation in respective PINSEL register.
  2. Configure TCR to enable the Counter for incrementing the TC, and Enable the PWM block.
  3. Set the required pre-scalar value in PR. In our case it will be zero.
  4. Configure MCR to reset the TC whenever it matches MR0.
  5. Update the Cycle time in MR0. In our case it will be 100.
  6. Load the Duty cycles for required PWMx channels in respective match registers MRx(x: 1-6).
  7. Enable the bits in LER register to load and latch the new match values.
  8. Enable the required pwm channels in PCR register.

Interfacing Diagram

DC_Motor_Interfacing_with_LPC1768.png

Embedded C Code to Control Speed of DC Motor

Program to generate PWM signal with 0-100 duty cycle on PWM_1 Channel (P2.0)
#include <lpc17xx.h>
void delay_ms(unsigned int ms)
{
   unsigned int i,j;
   for(i=0;i<ms;i++)
       for(j=0;j<50000;j++);
}

int main(void)
{
int dutyCycle;
 SystemInit();
LPC_PINCON->PINSEL4 = 0x00000001;//Cofigure pins(P2_0) for PWM mode.
LPC_PWM1->TCR = 0x00000005;// Enable Counters,PWM module
LPC_PWM1->PR  =  0x0;         //No Prescalar
LPC_PWM1->MCR = 0x00000002; //Reset on PWMMR0, reset TC if it matches MR0
LPC_PWM1->MR0 = 100; // set PWM cycle(Ton+Toff)=100)
LPC_PWM1->MR1 = 50;// Set 50% Duty Cycle for channel1
LPC_PWM1->LER = 0x00000003; //Trigger the latch Enable Bits to load the new Match Values
LPC_PWM1->PCR = 0x00000200;// Enable the PWM output pins for PWM_1-(P2_0)
   while(1)
    {
       for(dutyCycle=0; dutyCycle<100; dutyCycle++)
        {
            LPC_PWM1->MR1 = dutyCycle; // Increase the dutyCycle from 0-100
           LPC_PWM1->LER = 0x00000003; //Trigger the latch Enable Bits to load the new Match Values
           delay_ms(10);
        }
     
    }

Note: Students can also write down the Algorithm for speed control of DC motor using above code

Applications of ARM Cortex (LPC1768)

  1. eMetering
  2. Lighting
  3. Industrial networking
  4. Alarm systems
  5. White goods
  6. Motor control 

References

  • Notes by Prof. Sujit Wagh
  • LPC176x/5x User manual/ Datasheet: nxp
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Created by 1stVolunteer on 2017/06/21 13:00