Unit 2: Sequential Logic Design

Updated on 2017/08/19 10:29

 

Unit 2: Sequential Logic Design

  • 1 Bit Memory Cell, Clocked SR, JK, MS J-K flip flop, D and T flip-flops. Use of preset and clear terminals, Excitation Table for flip flops. Conversion of flip flops. Application of Flip flops: Registers, Shift registers, Counters (ring counters, twisted ring counters), Sequence Generators, ripple counters, up/down counters, synchronous counters, lock out, Clock Skew, Clock jitter. Effect on synchronous designs. 

References

  • WikiNote Foundation
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Created by Sujit Wagh on 2017/08/19 10:29